Using an element which has a transistor structure (hereinafter, referred to as “memory transistor”) as a memory element which can be used as a ROM (read only memory) has been conventionally proposed.
For example, Patent Document 1 discloses a nonvolatile memory transistor which has a MOS transistor structure. In this memory transistor, a high electric field is applied to a gate insulating film so as to cause a dielectric breakdown, whereby writing is realized. Patent Document 2 discloses a memory transistor which utilizes a variation in threshold voltage which can be caused by application of a predetermined writing voltage to a gate.
On the other hand, Patent Document 3 of the present applicant proposes a novel nonvolatile memory transistor which is capable of reducing the power consumption as compared with conventional nonvolatile memory transistors. This memory transistor uses a metal oxide semiconductor in the active layer (channel) and can irreversibly change to a resistor state which exhibits an ohmic resistance characteristic due to Joule heat produced by the drain current, irrespective of the gate voltage. Using such a memory transistor enables to make a voltage for writing lower than the voltages in Patent Documents 1 and 2. Note that, in this specification, the operation of changing an oxide semiconductor of this memory transistor to a resistor state is referred to as “writing”. In this memory transistor, the metal oxide semiconductor is a resistor after writing, and therefore, the memory transistor does not work as a transistor. However, in this specification, it is referred to as “memory transistor” even after transition to the resistor. Likewise, even after transition to the resistor, terms such as gate electrode, source electrode, drain electrode, channel electrode, etc., which are constituents of a transistor structure are used.
Patent Document 3 discloses forming a memory transistor in an active matrix substrate of a liquid crystal display device, for example.